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LTC3422 1.5A, 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect
FEATURES

DESCRIPTIO
700mA Continuous/1A Pulsed Output Current for Li-Ion to 5V Applications Synchronous Rectification: Up to 96% Efficiency True Output Disconnect Inrush Current Limiting Adjustable Automatic Burst Mode(R) Operation Low Noise, Fixed Frequency Operation from 100kHz to 3MHz 0.5V to 4.5V Input Range 2.25V to 5.25V Adjustable Output Voltage Guaranteed 1V Start-Up Programmable Soft-Start Synchronizable Oscillator Low Quiescent Current: 25A < 1A Shutdown Current Anti-Ringing Control Small (3mm x 3mm x 0.75mm) Thermally Enhanced 10-Pin DFN Package
The LTC(R)3422 is a high efficiency, current mode, fixed frequency, step-up DC/DC converter with true output disconnect and inrush current limiting. The part is guaranteed to start up from an input voltage of 1V. The device includes a 0.20 N-channel MOSFET switch and a 0.24 P-channel MOSFET synchronous rectifier. The output voltage, switching frequency, soft-start time, Burst Mode threshold and loop compensation are all simply programmed using tiny external passive components. Quiescent current is only 25A during Burst Mode operation, maximizing battery life in portable applications. The oscillator frequency can be programmed up to 3MHz and can be synchronized to an external clock applied to the SYNC pin. Other features include 1A shutdown, short-circuit protection, anti-ringing control, thermal shutdown and current limit. The LTC3422 is available in a (3mm x 3mm x 0.75mm) 10-pin DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIO S

Wireless Handsets Handheld Computers GPS Receivers MP3 Players
TYPICAL APPLICATIO
VIN 1.8V TO 3.2V 2 CELLS
2.4V to 3.3V Efficiency and Power Loss
100 10000 BURST EFFICIENCY 1000 PWM EFFICIENCY
POWER LOSS (mW)
4.7H
90 80
+
4.7F VIN SYNC LTC3422 OFF ON SHDN VC 1nF 15k 20pF SS 0.1F RT FB BURST GND 28k 1nF 301k 549k SW VOUT 22F 931k
EFFICIENCY (%)
VOUT 3.3V 600mA
70 60 50 40 30 20 10 0 0.1 1
3422 TA01a
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100 PWM POWER LOSSES BURST POWER LOSSES 10 1 fOSC = 1MHz 10 100 LOAD CURRENT (mA) 0 1000
3422 TA01b
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LTC3422
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW SW VIN BURST SS SHDN 1 2 3 4 5 11 10 VOUT 9 SYNC 8 RT 7 VC 6 FB
VIN, VOUT, SYNC Voltages ........................... - 0.3V to 6V SS, BURST, SHDN Voltages ...................... - 0.3V to 6V SW Voltage DC .......................................................... - 0.3V to 6V Pulsed < 100ns ...................................... - 0.3V to 7V Operating Temperature Range (Notes 2, 5) ............................................. -40C to 85C Storage Temperature Range ................. - 65C to 125C
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN
TJMAX = 125C, JA = 43C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3422EDD
DD PART MARKING LBRN
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 1.2V, VOUT = 3.3V, RT = 28k, unless otherwise noted. (Note 2)
PARAMETER Minimum VIN Start-Up Voltage Minimum VIN Operating Voltage Output Voltage Adjust Range
ELECTRICAL CHARACTERISTICS
CONDITIONS ILOAD < 1mA (Note 3)
MIN
TYP 0.88
MAX 1 0.5 5.25 5.25
UNITS V V V V V nA A A mA A A A A A mA %
2.25 2.40 1.192 1.216 1 25 0.1 0.75 0.1 0.1 0.20 0.24
Feedback Voltage Feedback Input Current Quiescent Current--Burst Mode Operation Quiescent Current--Shutdown Quiescent Current--Active NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance NMOS Current Limit--Steady State NMOS Current Limit--Pulsed NMOS Current Limit--Short Circuit NMOS Burst Current Limit Maximum Duty Cycle Minimum Duty Cycle Frequency Accuracy SYNC Input High SYNC Input Low SYNC Input Current VOUT = 2V VOUT = 3.3V VOUT = 3.3V VFB = 1.216V VC = 0V (Note 4) SHDN = 0V, VOUT = 0V VC = 0V (Note 4)
1.240 50 42 1 1.1 5 10
Duty Cycle Not to Exceed 5% VOUT = 500mV

1.5 2
2.5 0.75 600 91
1.5
84 0.85 2.2
0 1 1.15 0.8 0.01 1
2
U
% MHz V V A
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LTC3422
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 1.2V, VOUT = 3.3V, RT = 28k, unless otherwise noted. (Note 2)
PARAMETER SHDN Input High SHDN Input Low SHDN Input Current Error Amp Transconductance Soft-Start Current Source BURST Threshold Voltage VSS = 1V Falling Edge, Sensed at the BURST Pin -5 0.79 CONDITIONS VOUT = 0V (Turn-On Threshold, Initial Start-Up) VOUT > 2.4V (Stay-On Threshold) Turn-Off Threshold VSHDN = 3.3V
ELECTRICAL CHARACTERISTICS
MIN 1 0.65
TYP
MAX
UNITS V V
0.25 0.01 50 -2.4 0.88 -1.2 0.97 1
V A S A V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3422E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Once VOUT is greater than 2.4V, the LTC3422 is not dependent on the VIN supply.
Note 4: Current is measured into the VOUT pin since the supply current is bootstrapped to the output. The current will reflect to the input supply by (VOUT/VIN) * Efficiency. The outputs are not switching. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
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LTC3422 TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25C, unless otherwise specified)
Single Cell to 3.3V Efficiency
100 90 80
EFFICIENCY (%)
EFFICIENCY (%)
60 50 40 30 20 10 BURST EFFICIENCY VIN = 1.6V VIN = 1.25V VIN = 0.9V
PWM EFFICIENCY VIN = 1.6V VIN = 1.25V VIN = 0.9V
60 50 40 30 20 10
EFFICIENCY (%)
70
fOSC = 1MHz 0 1 0.1 10 100 LOAD CURRENT (mA)
Burst Mode Operation
VOUT 50mV/DIV AC COUPLED SW 2V/DIV INDUCTOR CURRENT 0.5A/DIV VIN = 2.4V ILOAD = 20mA 2s/DIV
3422 G04
Efficiency vs Frequency
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 VIN = 2.4V VOUT = 3.3V 10 100 OUTPUT CURRENT (mA) 1000
3422 G07
fOSC = 300kHz 90 80 70 60 50 40 1 VOUT = 3.3V PWM AT 200mA LOAD 1.5 2 2.5 3 3.5 4 INPUT VOLTAGE (V) 4.5 5
START VOLTAGE (V)
fOSC = 3MHz
EFFICIENCY (%)
fOSC = 1MHz
4
UW
3422 G01
2-Cell to 3.3V Efficiency
100 90 80 70
Li-Ion to 5V Efficiency
100 90 80
BURST EFFICIENCY VIN = 3V VIN = 2.4V VIN = 1.8V
PWM EFFICIENCY VIN = 3V VIN = 2.4V VIN = 1.8V
70 60 50 40 30 20 10
1000
3422 G02
BURST EFFICIENCY VIN = 4.2V VIN = 3.6V VIN = 3.1V PWM EFFICIENCY VIN = 4.2V VIN = 3.6V VIN = 3.1V 1
1000
fOSC = 1MHz 0 0.1 1 10 100 LOAD CURRENT (mA)
0 0.1
fOSC = 1MHz 1000
3422 G03
10 100 LOAD CURRENT (mA)
Load Transient Response
VOUT 100mV/DIV AC COUPLED 300mA IOUT 100mA/DIV 50mA VIN = 2.4V VOUT = 3.3V COUT = 22F 200s/DIV
3422 G05
Inrush Current Control
VOUT 1V/DIV
INDUCTOR CURRENT 100mA/DIV
VIN = 0V TO 2.4V 500s/DIV VOUT = 3.3V COUT = 22F 100mA LOAD CURRENT
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Efficiency vs VIN
100
Start-Up Voltage vs Output Current
1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0 100 50 150 OUTPUT CURRENT (mA) 200
3422 G09
3422 G08
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LTC3422 TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25C, unless otherwise specified)
Burst Mode Output Current Threshold vs RBURST (3.3V Output)
140 120
VIN = 1.25V TO 2.9V VOUT = 3.3V fOSC = 1MHz
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
80
80 ENTERS BURST (MIN) 60 40 20 EXITS BURST (AVE)
VOLTAGE (V)
100
60
ENTERS BURST (MIN)
40 20
EXITS BURST (AVE)
0
50
150 250 350 450 550 650 750 850 RBURST (k)
3422 G10
Frequency Accuracy vs Temperature (Normalized About 1MHz)
1.02 30
QUIESCENT CURRENT (A)
1.01
FREQUENCY (MHz)
1.00
26
CURRENT (A)
0.99
0.98 -45 -30 -15
0 15 30 45 60 TEMPERATURE (C)
RDS(ON) vs Temperature
280 260 240 220 NMOS RDS(ON) 200 180 160 -45 -30 -15
INPUT CURRENT (A)
OUTPUT CURRENT (mA)
RESISTANCE (m)
PMOS RDS(ON)
0 15 30 45 60 TEMPERATURE (C)
UW
75
3422 G13
Burst Mode Output Current Threshold vs RBURST (5V Output)
140 120 100 VIN = 1.8V TO 4.2V VOUT = 5V fOSC = 1MHz 1.217
FB Voltage vs Temperature
1.216
1.215
1.214
0
50
125 200 275 350 425 500 575 650 RBURST (k)
3422 G11
1.213 -45 -30 -15
0 15 30 45 60 TEMPERATURE (C)
75
90
3422 G12
Burst Mode Quiescent Current vs Temperature
2.55
Current Limit Accuracy vs Temperature
28
2.50
2.45
24
2.40
90
22 -45 -30 -15
0 15 30 45 60 TEMPERATURE (C)
75
90
2.35 -45 -30 -15
0 15 30 45 60 TEMPERATURE (C)
75
90
3422 G14
3422 G15
No-Load Input Current vs VIN
170 160 150 140 130 120 110 100 90 80 70 60 50
75 90
1600 1400 1200 1000 800 600
Maximum Output Current vs VIN
2000 1800 VOUT = 3.3V VOUT = 5V 5V DIODE RECTIFICATION 3.3V DIODE RECTIFICATION fOSC = 1MHz
CHIP ENTERS Burst Mode OPERATION
VOUT = 5V VOUT = 3.3V
0.8 1.2 1.6
2 2.4 2.8 3.2 3.6 INPUT VOLTAGE (V)
4 4.4 4.8
3422 G17
400 1.80
2.40
3.00
3.60 4.20 4.80 INPUT VOLTAGE (V)
5.40
3422 G18
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LTC3422
PI FU CTIO S
SW (Pin 1): Switch Pin for the Inductor Connection. Minimize trace length between SW and inductor. For discontinuous inductor current, a controlled impedance is internally connected from SW to VIN to eliminate high frequency ringing, reducing EMI radiation. VIN (Pin 2): Input Supply Voltage. Connect VIN to the input supply and decouple with a 4.7F or larger ceramic capacitor as close to VIN as possible. BURST (Pin 3): Burst Mode Threshold Adjust. Automatic Burst Mode Operation: A resistor/capacitor combination from BURST to ground programs the average load current at which automatic Burst Mode operation is exited, according to the formula: The nominal soft-start charging current is 2.4A. The active range of SS is from 0.8V to 1.6V. SHDN (Pin 5): Shutdown Input. Less than 250mV on SHDN shuts down the LTC3422. Placing 1V or more on SHDN enables the LTC3422. Once VOUT exceeds 2.2V, hysteresis is applied to this pin (500nA exits the pin) allowing it to operate at a logic high while the battery can drop to 500mV. FB (Pin 6): Feedback Input to Error Amplifier. Connect the VOUT to ground resistor divider tap here. The output voltage can be adjusted from 2.25V to 5.25V according to the formula: VOUT = 1.216 * R1 + R2 R2
RB =
12 IEXITBURST
where RB is in k and IEXITBURST is in amps
C *V CB OUT OUT 64, 000
where CB(MIN) and COUT are in F. Please refer to the Burst Mode Output Current Threshold vs RBURST Typical Performance Chacteristic curves. Note that during Burst Mode operation the peak inductor current will be approximately 600mA and return to zero on each cycle. In Burst Mode operation the frequency is variable, providing a significant efficiency improvement at light loads. The LTC3422 only allows Burst Mode operation to be entered once VOUT exceeds approximately 2.2V. Manually Implementing Burst Mode Operation: Ground BURST to force Burst Mode operation or connect it to VOUT to force fixed frequency PWM mode. Note that BURST must not be pulled higher than VOUT. SS (Pin 4): Soft-Start. Connect a capacitor from SS to ground to set the soft-start time according to the formula: t(ms) = CSS(F) * 320
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VC (Pin 7): Error Amp Output. A frequency compensation network is connected from VC to ground to compensate the loop. See the section "Compensating the Feedback Loop" for guidelines. RT (Pin 8): Frequency Adjust Input. Connect a resistor to ground to program the oscillator frequency according to the formula:
fOSC =
28 RT
where fOSC is in MHz and RT is in k. SYNC (Pin 9): Oscillator Synchronization Input. A clock pulse width of 100ns to 2s is required to synchronize the internal oscillator. If not used, SYNC should be grounded. VOUT (Pin 10): Output of the synchronous rectifier and bootstrapped power source for the LTC3422. A ceramic capacitor of at least 10F is required and should be located as close to VOUT and the power ground plane as possible. Exposed Pad (Pin 11): Signal and Power Ground for the LTC3422. This pin MUST be soldered to the PCB ground plane for electrical contact and rated thermal performance.
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LTC3422
BLOCK DIAGRA
VIN 1V TO 4.5V
+
CIN 10F
SHUTDOWN AND VBIAS
CURRENT SENSE
IZERO COMP
BURST SLEEP
PWM COMP
BURST MODE CONTROL
+ +
+
IMAX COMP 1.5A START-UP CURRENT RAMP
-
SLOPE COMPENSATION
START-UP SOFT-START AND THERMAL REG
OSCILLATOR EXPOSED PAD 11 8 RT 28k RT 9 RB 301k SYNC 3 CB 1nF BURST 4 CSS 0.1F SS
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OPERATIO
LOW VOLTAGE START-UP The LTC3422 includes an independent start-up oscillator designed to start up at input voltages of 0.88V typical. During start-up, the peak current limit is gradually
increased in conjunction with the soft-start ramp. Switching frequency is also internally controlled during start-up. The device can start up under some load (see graph of Start-Up Voltage versus Output Current). Soft-start and
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+
-
AWAKEN COMP
-
BURST COMP
REFERENCE 0.88V 0.88V THERMAL SHUTDOWN
-2%
gm ERROR AMPLIFIER
+
-
+
+
-+-
W
L1 4.7H OPTIONAL 5 SHDN 2 VIN ANTIRING SHDN 1 SW VIN CURRENT SENSE BULK CONTROL SIGNALS VOUT PWM LOGIC AND DRIVERS VOUT 2.25V TO 5.25 10 1.216V R1 FB 6 R2 1.216V VC COUT 22F 7 CC1 1nF RZ 15k CC2 20pF
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LTC3422
OPERATIO
inrush current limiting are provided during start-up as well as normal switching mode. The same soft-start capacitor is used for each operating mode. When either VIN or VOUT exceeds 2.25V, the LTC3422 enters normal operating mode. Once the output voltage exceeds the input by 0.3V typical, the LTC3422 powers itself from VOUT instead of VIN. At this point the internal circuitry has no dependency on the VIN input voltage, eliminating the requirement for a large input capacitor. The input voltage can drop as low as 0.5V without affecting circuit operation. The limiting factor for the application becomes the availability of the power source to supply sufficient energy to the output at the low voltages and the maximum duty cycle, which is clamped at 91% typical. LOW NOISE FIXED FREQUENCY OPERATION Shutdown The part is shutdown by pulling SHDN below 0.25V, and activated by pulling the pin initially above 1V. Once VOUT exceeds 2.2V typical, hysteresis is applied to this pin allowing it to maintain a logic high state down to 0.65V. Note that SHDN can be driven above VIN or VOUT as long as it is limited to less than the absolute maximum rating. Soft-Start The soft-start time is programmed with an external capacitor from SS to ground. An internal current source charges it with a nominal 2.4A. The ramping voltage on SS dictates the gradually increasing peak current limit until the voltage on the capacitor exceeds 1.6V, after which the internally set peak current limit is maintained. In the event of a commanded shutdown or a thermal shutdown, the capacitor on SS is discharged to ground automatically. Note that Burst Mode operation is inhibited during the soft-start time. t (ms) = CSS (F) * 320 Oscillator The frequency of operation is set through a resistor from RT to ground. A precision timing capacitor resides inside the LTC3422. The oscillator can be synchronized with an external clock applied to SYNC. When synchronizing the Anti-Ringing Control The anti-ringing control connects a resistor across the inductor to dampen the ringing on SW during discontinuous conduction mode. The LCSW ringing (L = inductor, Error Amplifier The error amplifier is a transconductance amplifier, with its positive input internally connected to the 1.216V reference and its negative input connected to FB. A simple compensation network is placed from VC to ground. Internal clamps limit the minimum and maximum error amplifier output voltage for improved large-signal transient response. Current Limit The current limit circuitry shuts off the internal N-channel MOSFET switch when the current limit threshold is reached. In Burst Mode operation, the current limit is reduced to approximately 600mA. Zero Current Amplifier The zero current amplifier monitors the inductor current to the output and shuts off the synchronous rectifier once the current falls below 50mA typical, preventing negative inductor current.
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oscillator, the free running frequency must be set at least 20% lower than the desired synchronized frequency.
fOSC = 28 RT
where fOSC is in MHz and RT is in k. Current Sensing Lossless current sensing converts the peak current signal to a voltage to sum in with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. The LTC3422 incorporates slope compensation which is adaptive to the input and output voltages. Therefore, the converter provides the proper amount of slope compensation to ensure stability, but not an excess which would cause a loss of phase margin in the converter.
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LTC3422
OPERATIO
CSW = SW Capacitance) is low energy, but can cause EMI radiation. Burst Mode OPERATION Burst Mode operation can be automatic or user controlled. In automatic operation, the LTC3422 will automatically enter Burst Mode operation at light load and return to fixed frequency PWM mode for heavier loads. The user can program the average load current at which the mode transition occurs using a single resistor connected from BURST to GND. The oscillator is shut down during Burst Mode operation, since the on time is determined by the time it takes the inductor current to reach a fixed 600mA peak current and the off time is determined by the time it takes for the inductor current to return to zero. In Burst Mode operation, the LTC3422 delivers energy to the output until it is regulated and then enters a sleep state, where the switches are kept off while the LTC3422 consumes only 25A of quiescent current. In this mode the output ripple has a variable frequency component with load current and will be typically 2% peak-peak. This maximizes efficiency at very light loads by minimizing switching and quiescent losses. Burst Mode operation ripple can be reduced slightly by increasing the output capacitance (47F or greater). This additional capacitance does not need to be a low ESR type if low ESR ceramics are also used. Another method of reducing Burst Mode operation ripple is to place a small feed-forward capacitor (10pF to 100pF) across the upper resistor in the VOUT feedback divider network. In Burst Mode operation, the compensation network is not used and VC is disconnected from the error amplifier. During long periods of Burst Mode operation, leakage currents in the external components or on the PC board could cause the compensation capacitor to charge (or discharge), which could result in a large output transient when returning to fixed frequency mode of operation, even at the same load current. To prevent this, the LTC3422 incorporates an active clamp circuit that holds the voltage on VC at an optimal voltage during Burst Mode operation. This minimizes any output transient when returning to fixed frequency mode operation.
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Automatic Burst Mode Operation Control For automatic operation, an RC network should be connected from BURST to ground. The value of the resistor will control the average load current (IBURST) at which Burst Mode operation will be entered and exited (there is hysteresis to prevent oscillation between modes). The equation given for the capacitor on BURST is the minimum value to prevent ripple on BURST from causing the part to oscillate in and out of Burst Mode operation at the current where the mode transition occurs. The equation given for the resistor on BURST is the typical average load current at which automatic Burst Mode operation is exited.
RB = 12 IEXITBURST
where RB is in k and IEXITBURST is in amps.
CB
COUT * VOUT 64, 000
where CB(MIN) and COUT are in F. Please refer to the Burst Mode Output Current Threshold vs RBURST Typical Performance Chacteristic curves. In the event that a load transient causes FB to drop by more than 4% from the regulation value while in Burst Mode operation, the LTC3422 will immediately switch to fixed frequency operation and an internal pull-up will be momentarily applied to BURST, rapidly charging the BURST capacitor. This prevents the LTC3422 from immediately re-entering Burst Mode operation once the output achieves regulation. Manual Burst Mode Operation For optimum transient response with large dynamic loads, the operating mode should be controlled manually by the host. By commanding fixed frequency PWM operation prior to a sudden increase in load, output voltage droop can be minimized. For manual control of Burst Mode operation, the RC network connected to BURST can be eliminated. To force fixed frequency PWM mode, BURST should be connected to VOUT. To force Burst Mode operation, BURST should be grounded. When commanding Burst Mode operation manually, the circuit connected to
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LTC3422
OPERATIO U
Simplified Diagram of Automatic Burst Mode Control Circuit
VCC VREF - 4%
+ -
UVLO COMP
2mA
IOUT 10,500
FB 6
SSDONE 0 = PWM MODE 1 = Burst Mode OPERATION ERROR AMP/ SLEEP COMP BURST
-
VREF 1%
SLEEP
+
COMP CLAMP 500mV TO 1V VC 7 CC1 RZ RB CB 3 BURST
BURST must be able to sink up to 2mA. Burst Mode operation is inhibited during soft-start. If VIN is greater than VOUT - 300mV, the part will exit Burst Mode operation and the synchronous rectifier will be disabled. Note that if the load current applied during forced Burst Mode operation (BURST is grounded) exceeds the current that can be supplied, the output voltage will start to droop and the LTC3422 will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. Once regulation is achieved, the LTC3422 will then enter Burst Mode operation once again (since the user is
still commanding this by grounding BURST ) and the cycle will repeat, resulting in about 4% output ripple. The maximum average current that can be supplied in Burst Mode operation is given by:
IOUT(MAX) = 275 * VIN in mA VOUT
Output Disconnect and Inrush Limiting The LTC3422 is designed to allow true output disconnect by eliminating body diode conduction of the internal P-channel MOSFET rectifier. This allows VOUT to go to zero volts during shutdown without drawing any current from
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-
880mV TO 1.16V
BURST COMP
+
3422 AI01
LTC3422
OPERATIO
the input source. It also allows for inrush current limiting at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there must not be any external Schottky diodes connected between the SW pin and VOUT.
APPLICATIO S I FOR ATIO
Note: Board layout is extremely critical to minimize voltage overshoot on SW due to stray inductance. Keep the output filter capacitors as close as possible to VOUT and use very low ESR/ESL ceramic capacitors tied to a good ground plane.
VOUT 1 SW LTC3422 VOUT 10 SYNC RT VC FB 9 8 7 6
3422 F01
Figure 1. Recommended Component Placement. Traces Carrying High Current are Direct (GND, SW, VIN, VOUT). Trace Area at FB and VC are Kept Low. Lead Length to Battery Should be Kept Short. VIN and VOUT Ceramic Capacitors Should be as Close to the LTC3422 Pins as Possible
COMPONENT SELECTION Inductor Selection The high frequency operation of the LTC3422 allows the use of small surface mount inductors. The minimum inductance value is proportional to the operating frequency and is limited by the following constraints:
L>
+
VIN
2 VIN 3 BURST 4 SS 5 SHDN
MULTIPLE VIAS TO GROUND PLANE
VIN(MIN) * VOUT(MAX) - VIN(MIN) 3 and L > * Ripple * VOUT(MAX)
(
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It should also be noted that the LTC3422 provides inrush current limiting without reducing the maximum load current capability during start-up. The internally set peak current command of the LTC3422 is allowed to gradually increase during the soft-start period until it reaches the nominal maximum level. where: f = Operating Frequency in MHz Ripple = Allowable Inductor Current Ripple (Amps Peak-Peak) VIN(MIN) = Minimum Input Voltage VOUT(MAX) = Maximum Output Voltage The inductor current ripple is typically set 20% to 40% of the maximum inductor current. For high efficiency, choose an inductor with high frequency core material, such as ferrite, to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support peak inductor currents in the 2A to 3A region. To minimize radiated noise, use a toroidal or shielded inductor. See Table 1 for suggested inductor suppliers and Table 2 for a list of capacitor suppliers.
Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEB SITE www.coilcraft.com www.circuitprotection. com/magnetics.asp www.murata.com Coilcraft (847) 639-6400 (847) 639-1469 CoEv (800) 277-7040 (650) 361-2508 Magnetics Murata USA: USA: (814) 237-1431 (814) 238-0490 (800) 831-9172 Sumida USA: (847) 956-0666 Japan: 81-3-3607-5111
)
USA: www.sumida.com (847) 956-0702 Japan: 81-3-3607-5144
TDK TOKO Wurth
(847) 803-6100 (847) 803-6296 www.component.tdk.com (847) 297-0070 (847) 669-7864 www.toko.com (201) 785-8800 (201) 785-8810 www.we-online.com
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LTC3422
APPLICATIO S I FOR ATIO
Output Capacitor Selection The output voltage ripple has two components to it. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The maximum ripple due to charge is given by:
VR(BULK) = IP * VIN COUT * VOUT *
where IP = peak inductor current
EFFICIENCY (%)
The ESR (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is simply given by: VRCESR = IP * CESR where CESR = capacitor equivalent series resistance. Low ESR capacitors should be used to minimize output voltage ripple. For most applications, Murata or Taiyo Yuden X5R ceramic capacitors are recommended. Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. Since the LTC3422 can operate at voltages below 0.5V once the output is regulated, the demand on the input capacitor is much less. In most applications 1F per Amp of peak input current is recommended. Taiyo Yuden offers very low ESR ceramic capacitors, for example the 1F in a 0603 case (JMK107BJ105MA).
Table 2. Capacitor Vendor Information
PHONE (803) 448-9411 (619) 661-6322 (847) 803-6100 USA: (814) 237-1431 (800) 831-9172 Taiyo Yuden (408) 573-4150 SUPPLIER AVX Sanyo TDK Murata FAX (803) 448-1943 (619) 661-1055 (847) 803-6296 USA: (814) 238-0490 WEB SITE www.avxcorp.com www.sanyovideo.com www.component.tdk.com www.murata.com
(408) 573-4159 www.t-yuden.com
Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter, such as, what are the sensitive frequency bands that cannot tolerate any spectral noise.
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Another consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade off is in efficiency since the switching losses due to gate charge are proportionally increasing with frequency. For example, as shown in Figure 2, for a 2.4V to 3.3V converter, the efficiency at 160mA is 9% less at 3MHz versus 300kHz.
100 90 80 70 60 50 40 30 20 10 0 1 VIN = 2.4V VOUT = 3.3V 10 100 OUTPUT CURRENT (mA) 1000
3422 F02
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fOSC = 300kHz fOSC = 3MHz
Figure 2. 2.4V to 3.3V Efficiency vs Frequency of Operation
The final consideration is whether the application can allow "pulse skipping." In this mode, the minimum on time of the converter cannot support the duty cycle, so the converter ripple will go up and there will be a low frequency component of the output ripple. In many applications where physical size is the main criterion, running the converter in this mode is acceptable. In applications where it is preferred not to enter this mode, the maximum operating frequency is given by:
MAX _ NOSKIP =
VOUT - VIN Hz VOUT * tON(MIN)
where tON(MIN) = minimum on time = 120ns. Thermal Considerations To deliver the power that the LTC3422 is capable of it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This can be accomplished by taking advantage of the large thermal pad on the underside of the LTC3422. It is recommended that multiple vias in the printed circuit board be used to
3422f
LTC3422
APPLICATIO S I FOR ATIO
conduct heat away from the LTC3422 and into the copper plane with as much area as possible. In the event that the junction temperature gets too high, the peak current limit will automatically be decreased. If the junction temperature continues to rise, the LTC3422 will go into thermal shutdown and all switching will stop until the internal temperature drops. VIN > VOUT Operation The LTC3422 will maintain voltage regulation when the input voltage is above the output voltage. This is achieved by terminating the switching of the synchronous P-channel MOSFET and applying VIN statically on the gate. This will ensure the volt * seconds of the inductor will reverse during the time current is flowing to the output. Since this mode will dissipate more power in the LTC3422, the maximum output current is limited in order to maintain an acceptable junction temperature and is given by:
125 - TA IOUT(MAX) = 43 * (( VIN + 1.5) - VOUT )
where TA = ambient temperature. For example at VIN = 4.5V, VOUT = 3.3V and TA = 85C, the maximum output current is 345mA. Short Circuit The LTC3422 output disconnect feature allows output short circuit while maintaining a maximum internally set current limit. However, the LTC3422 also incorporates internal features such as current limit foldback and thermal shutdown for protection from an excessive overload or short circuit. During a prolonged short circuit the current limit folds back to 0.75A typical should VOUT drop below approximately 666mV. This 0.75A current limit remains in effect until VOUT exceeds approximately 800mV, at which time the steady-state current limit is restored. Closing the Feedback Loop The LTC3422 utilizes current mode control with internal adaptive slope compensation. Current mode control eliminates the 2nd order filter due to the inductor and output
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capacitor exhibited in voltage mode controllers, thus simplifying it to a single pole filter response. The product of `the modulator control to output DC gain' and `the error amp open-loop gain' gives the DC gain of the system:
GDC = GCONTROL _ OUTPUT * GEA * GCONTROL _ OUTPUT = VREF VOUT 2 * VIN ; GEA 2000 IOUT
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The output filter pole is given by:
FILTER _ POLE = IOUT * VOUT * COUT
where COUT is the output filter capacitor. The output filter zero is given by:
FILTER _ ZERO =
1 2 * * RESR * COUT
where RESR is the capacitor equivalent series resistance. A troublesome feature of the boost regulator topology is the right-half plane zero (RHP), given by:
VIN2 RHPZ = 2 * * IOUT * L * VOUT
At heavy loads this gain increase with phase lag can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. The typical error amplifier compensation is shown in Figure 3. The equations for the loop dynamics are as follows:
1 which is extremely close to DC 2 * * 20e6 * CC1 1 ZERO1 2 * * RZ * CC1 1 POLE2 2 * * RZ * CC2 POLE1
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13
LTC3422
APPLICATIO S I FOR ATIO U
VOUT
TYPICAL APPLICATIO S
2-Cell to 3.3V at 600mA Application
L1 4.7H
VIN 1.8V TO 3.2V 2 CELLS
+
EFFICIENCY (%)
CIN* 4.7F
VIN SYNC
LTC3422 OFF ON CC1 1nF RZ 15k SHDN VC SS CC2 20pF CSS 0.1F RT FB BURST GND RT 28k
*LOCATE COMPONENTS CLOSE TO PINS CIN: TAIYO YUDEN X5R JMK212BJ475MD COUT: TAIYO YUDEN X5R JMK325BJ226MM L1: TDK RLF7030T-4R7M3R4
1-Cell to 3.3V at 240mA Application
L1 4.7H
VIN 0.9V TO 1.6V 1 CELL
+
EFFICIENCY (%)
CIN* 10F
VIN SYNC
LTC3422 OFF ON CC1 1nF RZ 15k SHDN VC SS CC2 20pF CSS 0.1F RT FB BURST GND RT 28k
*LOCATE COMPONENTS CLOSE TO PINS CIN, COUT: TAIYO YUDEN X5R JMK212BJ106MM L1: TDK RLF7030T-4R7M3R4
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SW
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+
gm ERROR AMPLIFIER
1.216V FB 6 VC 7 CC1 RZ CC2
10 R1
-
R2
3422 F03
Figure 3. Typical Error Amplifier Compensation
2-Cell to 3.3V Efficiency and Power Loss at 1MHz
100 90 80 70
COUT* 22F VOUT 3.3V 600mA
10000
1000 VIN = 3V VIN = 2.4V VIN = 1.8V VIN = 3V VIN = 2.4V VIN = 1.8V
POWER LOSS (mW)
VOUT
60 50 40 30 20 10 0 0.1
100
R1 931k R2 549k
VIN = 1.8V 10 VIN = 2.4V VIN = 3V VIN = 1.8V VIN = 2.4V VIN = 3V 1 10 100 LOAD CURRENT (mA) 1
CB 1nF
RB 301k
3422 TA02a
0 1000
3422 TA02b
BURST EFFICIENCY PWM EFFICIENCY PWM POWER LOSSES BURST POWER LOSSES
1-Cell to 3.3V Efficiency and Power Loss at 1MHz
100 90 80 VIN = 1.6V VIN = 1.25V VIN = 0.9V 10000
1000
POWER LOSS (mW)
SW VOUT COUT* 10F
R1 931k R2 549k
VOUT 3.3V 240mA
70 60 50 40 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) 0 1000
3422 TA03b
100
10 VIN = 0.9V VIN = 1.25V VIN = 1.6V
1
CB 1nF
RB 374k
3422 TA03a
BURST EFFICIENCY PWM EFFICIENCY PWM POWER LOSSES BURST POWER LOSSES
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LTC3422
TYPICAL APPLICATIO S
Li-Ion to 5V at 700mA Application
L1 3H
VIN 3.1V TO 4.2V Li-Ion
+
SYNC LTC3422 OFF ON CC1 1nF RZ 15k SHDN VC SS CC2 20pF CSS 0.1F RT
VOUT COUT* 22F FB BURST GND RT 28k CB 2.2nF R2 365k RB 90.9k
3422 TA05a
R1 1.13M
VOUT 5V 700mA
EFFICIENCY (%)
CIN* 10F
VIN
*LOCATE COMPONENTS CLOSE TO PINS CIN: TAIYO YUDEN X5R JMK212BJ106MM COUT: TAIYO YUDEN X5R JMK325BJ226MM
2-Cell to 5V at 375mA Application
VIN 1.8V TO 3.2V 2 CELLS L1 3H
+
CIN* 10F
VIN SYNC
VOUT LTC3422 COUT* 22F FB BURST RT CSS 0.1F GND RT 28k CB 2.2nF R2 365k RB 931k
3422 TA06a
EFFICIENCY (%)
OFF ON CC1 1nF RZ 15k
SHDN VC SS
CC2 20pF
*LOCATE COMPONENTS CLOSE TO PINS CIN: TAIYO YUDEN JMK212BJ106MM COUT: TAIYO YUDEN JMK325BJ226MM
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Li-Ion to 5V Efficiency and Power Loss at 1MHz
100 90 80 1000 VIN = 4.2V VIN = 3.6V VIN = 3.1V 10000
POWER LOSSES (mW)
SW
70 60 50 40 30 20 10 0 0.1
100
VIN = 3.1V VIN = 3.6V VIN = 4.2V
10
1
1
10 100 LOAD CURRENT (mA)
0 1000
3422 TA05b
L1: SUMIDA CDRH6D28-3R0
BURST EFFICIENCY PWM EFFICIENCY BURST POWER LOSSES PWM POWER LOSSES
2-Cell to 5V Efficiency and Power Loss at 1MHz
100 90 80 1000 10000
SW
POWER LOSSES (mW)
R1 1.13M
VOUT 5V 375mA
70 60 50 40 30 20 10 0 0.1
VIN = 3.2V VIN = 2.4V VIN = 1.8V VIN = 1.8V VIN = 2.4V VIN = 3.2V
100
10
1
1
10 100 LOAD CURRENT (mA)
0 1000
3422 TA06b
L1: SUMIDA CDRH6D28-3R0
BURST EFFICIENCY PWM EFFICIENCY BURST POWER LOSSES PWM POWER LOSSES
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LTC3422
PACKAGE DESCRIPTIO U
DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115 TYP 6 0.675 0.05 0.38 0.10 10 3.00 0.10 (4 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (SEE NOTE 6) 5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD 1 1.65 0.10 (2 SIDES)
(DD10) DFN 1103
3.50 0.05 1.65 0.05 2.15 0.05 (2 SIDES)
0.25 0.05 0.50 BSC
0.00 - 0.05
RELATED PARTS
PART NUMBER LTC3400/LTC3400B LTC3401 LTC3402 LTC3421 LTC3423/LTC3424 LTC3425 LTC3426 LTC3428 LTC3429 LTC3525-3.3/ LTC3525-5 DESCRIPTION 600mA (ISW), 1.2MHz, Synchronous Step-Up DC/DC Converters 1A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 2A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 3A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 1A/2A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 5A (ISW), 8MHz, (Low Ripple), 4-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect 2A (ISW), 1.2MHz, Step-Up DC/DC Converter 500mA (ISW), 1.25MHz/2.5MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 600mA (ISW), 500kHz, Synchronous Step-Up DC/DC Converter with Output Disconnect and Soft-Start 400mA (ISW), Synchronous Step-Up DC/DC Converter in SC70 Package COMMENTS 92% Efficiency, VIN: 0.85V to 5V, VOUT(MAX) = 5V, IQ = 19A/300A, ISD < 1A, ThinSOTTM 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38A, ISD < 1A, MS10 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38A, ISD < 1A, MS10 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN24 95% Efficiency, VIN: 0.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 38A, ISD < 1A, MSOP10 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, QFN32 92% Efficiency, VIN: 1.6V to 4.3V, VOUT(MAX) = 5V, ISD < 1A, SOT-23 92% Efficiency, VIN: 1.8V to 5V, VOUT(MAX) = 5.25V, ISD < 1A, 2mm x 2mm DFN 96% Efficiency, VIN: 0.5V to 4.4V, VOUT(MAX) = 5V, IQ = 20A/300A, ISD < 1A, ThinSOT 94% Efficiency, VIN: 0.8V to 4.5V, VOUT(MAX) = 5.25V, IQ = 7A, ISD < 1A, SC70
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ThinSOT is a trademark of Linear Technology Corporation.
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT/TP 1005 500 PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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